? semiconductor components industries, llc, 2012 december, 2012 ? rev. 4 1 publication order number: ntmd6p02r2/d ntmd6p02, NVMD6P02 power mosfet 6 a, 20 v, p ? channel soic ? 8, dual features ? ultra low r ds(on) ? higher efficiency extending battery life ? logic level gate drive ? miniature dual soic ? 8 surface mount package ? diode exhibits high speed, soft recovery ? avalanche energy specified ? these devices are pb ? free and are rohs compliant ? nvmd prefix for automotive and other applications requiring unique site and control change requirements; aec ? q101 qualified and ppap capable applications ? power management in portable and battery ? powered products, i.e.: cellular and cordless telephones, and pcmcia cards maximum ratings rating symbol value unit drain ? to ? source voltage v dss ? 20 v gate ? to ? source voltage ? continuous v gs 12 v thermal resistance ? junction ? to ? ambient (note 1) total power dissipation @ t a = 25 c continuous drain current @ t a = 25 c continuous drain current @ t a = 70 c maximum operating power dissipation maximum operating drain current pulsed drain current (note 4) r ja p d i d i d p d i d i dm 62.5 2.0 ? 7.8 ? 5.7 0.5 ? 3.89 ? 40 c/w w a a w a a thermal resistance ? junction ? to ? ambient (note 2) total power dissipation @ t a = 25 c continuous drain current @ t a = 25 c continuous drain current @ t a = 70 c maximum operating power dissipation maximum operating drain current pulsed drain current (note 4) r ja p d i d i d p d i d i dm 98 1.28 ? 6.2 ? 4.6 0.3 ? 3.01 ? 35 c/w w a a w a a thermal resistance ? junction ? to ? ambient (note 3) total power dissipation @ t a = 25 c continuous drain current @ t a = 25 c continuous drain current @ t a = 70 c maximum operating power dissipation maximum operating drain current pulsed drain current (note 4) r ja p d i d i d p d i d i dm 166 0.75 ? 4.8 ? 3.5 0.2 ? 2.48 ? 30 c/w w a a w a a operating and storage temperature range t j , t stg ? 55 to +150 c single pulse drain ? to ? source avalanche energy ? starting t j = 25 c (v dd = ? 20 vdc, v gs = ? 5.0 vdc, peak i l = ? 5.0 apk, l = 40 mh, r g = 25 ) e as 500 mj maximum lead temperature for soldering purposes for 10 seconds t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. mounted onto a 2 square fr ? 4 board (1 in sq, 2 oz. cu 0.06 thick single sided), t = 10 seconds. 2. mounted onto a 2 square fr ? 4 board (1 in sq, 2 oz. cu 0.06 thick single sided), t = steady state. 3. minimum fr ? 4 or g ? 10 pcb, t = steady state. 4. pulse test: pulse width = 300 s, duty cycle = 2%. 6 amperes, 20 volts device package shipping ? ordering information ntmd6p02r2g soic ? 8 (pb ? free) 2500 / tape & reel d s g p ? channel soic ? 8 case 751 style 11 marking diagram & pin assignment e6p02 = specific device code x = blank or s a = assembly location y = year ww = work week = pb ? free package e6p02x ayww 1 8 1 8 s1 g1 s2 g2 d1 d1 d2 d2 ntmd6p02r2sg soic ? 8 (pb ? free) NVMD6P02r2g soic ? 8 (pb ? free) http://onsemi.com (note: microdot may be in either location) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d 2500 / tape & reel 2500 / tape & reel
ntmd6p02, NVMD6P02 http://onsemi.com 2 electrical characteristics (t c = 25 c unless otherwise noted)* characteristic symbol min typ max unit off characteristics drain ? to ? source breakdown voltage (v gs = 0 vdc, i d = ? 250 adc) temperature coefficient (positive) v (br)dss ? 20 ? ? ? 11.6 ? ? vdc mv/ c zero gate voltage drain current (v ds = ? 20 vdc, v gs = 0 vdc, t j = 25 c) (v ds = ? 20 vdc, v gs = 0 vdc, t j = 70 c) i dss ? ? ? ? ? 1.0 ? 5.0 adc gate ? body leakage current (v gs = ? 12 vdc, v ds = 0 vdc) i gss ? ? ? 100 nadc gate ? body leakage current (v gs = +12 vdc, v ds = 0 vdc) i gss ? ? 100 nadc on characteristics gate threshold voltage (v ds = v gs , i d = ? 250 adc) temperature coefficient (negative) v gs(th) ? 0.6 ? ? 0.88 2.6 ? 1.20 ? vdc mv/ c static drain ? to ? source on ? state resistance (v gs = ? 4.5 vdc, i d = ? 6.2 adc) (v gs = ? 2.5 vdc, i d = ? 5.0 adc) (v gs = ? 2.5 vdc, i d = ? 3.1 adc) r ds(on) ? ? ? 0.027 0.038 0.038 0.033 0.050 ? forward transconductance (v ds = ? 10 vdc, i d = ? 6.2 adc) g fs ? 15 ? mhos dynamic characteristics input capacitance (v ds = ? 16 vdc, v gs = 0 vdc, f = 1.0 mhz) c iss ? 1380 1700 pf output capacitance c oss ? 515 775 reverse transfer capacitance c rss ? 250 450 switching characteristics (notes 5 and 6) turn ? on delay time (v dd = ? 10 vdc, i d = ? 1.0 adc, v gs = ? 10 vdc, r g = 6.0 ) t d(on) ? 15 25 ns rise time t r ? 20 50 turn ? off delay time t d(off) ? 85 125 fall time t f ? 50 110 turn ? on delay time (v dd = ? 16 vdc, i d = ? 6.2 adc, v gs = ? 4.5 vdc, r g = 6.0 ) t d(on) ? 17 ? ns rise time t r ? 65 ? turn ? off delay time t d(off) ? 50 ? fall time t f ? 80 ? total gate charge (v ds = ? 16 vdc, v gs = ? 4.5 vdc, i d = ? 6.2 adc) q tot ? 20 35 nc gate ? source charge q gs ? 4.0 ? gate ? drain charge q gd ? 8.0 ? body ? drain diode ratings (note 5) diode forward on ? voltage (i s = ? 1.7 adc, v gs = 0 vdc) (i s = ? 1.7 adc, v gs = 0 vdc, t j = 125 c) v sd ? ? ? 0.80 ? 0.65 ? 1.2 ? vdc diode forward on ? voltage (i s = ? 6.2 adc, v gs = 0 vdc) (i s = ? 6.2 adc, v gs = 0 vdc, t j = 125 c) v sd ? ? ? 0.95 ? 0.80 ? ? vdc reverse recovery time (i s = ? 1.7 adc, v gs = 0 vdc, di s /dt = 100 a/ s) t rr ? 50 80 ns t a ? 20 ? t r ? 30 ? reverse recovery stored charge q rr ? 0.04 ? c 5. indicates pulse test: pulse width = 300 s max, duty cycle = 2%. 6. switching characteristics are independent of operating junction temperature. *handling precautions to protect against electrostatic discharge are mandatory.
ntmd6p02, NVMD6P02 http://onsemi.com 3 figure 1. on ? region characteristics ? v ds , drain ? to ? source voltage (volts) 12 8.0 6.0 2.0 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0 ? i d , drain current (amps) figure 2. transfer characteristics ? v gs , gate ? to ? source voltage (volts) 2.5 2.0 1.5 1.0 0 10 8.0 6.0 4.0 2.0 0 0 figure 3. on ? resistance versus gate ? to ? source voltage ? v gs , gate ? to ? source voltage (volts) 0.05 0.03 0.02 0.01 10 8.0 6.0 4.0 2.0 0 figure 4. on-resistance versus drain current and gate voltage ? i d , drain current (amps) 6.0 4.0 2.0 0 0.03 0.02 0.01 0 0.05 v ds ? 10 v t j = ? 55 c 25 c 100 c i d = ? 6.2 a t j = 25 c t j = 25 c v gs = ? 2.5 v ? 4.5 v t j = 25 c v gs = ? 1.3 v ? 1.8 v ? 2.1 v ? 1.5 v ? 3.1 v ? 10 v 4.0 10 ? 4.5 v ? 3.8 v ? 2.5 v 0.04 12 10 8.0 14 0.04 ? 2.7 v ? i d , drain current (amps) r ds(on) , drain ? to ? source resistance ( ) r ds(on) , drain ? to ? source resistance ( ) figure 5. on ? resistance variation with temperature t j , junction temperature ( c) 1.6 1.4 1.2 1 0.8 150 125 100 75 50 25 0 ? 25 ? 50 figure 6. drain ? to ? source leakage current versus voltage ? v ds , drain ? to ? source voltage (volts) 20 16 12 8 4 100 10 ? i dss , leakage (na) 0.01 0.6 1000 i d = ? 6.2 a v gs = ? 4.5 v t j = 125 c v gs = 0 v 100 c 1 0.1 25 c r ds(on) , drain ? to ? source resistance (normalized)
ntmd6p02, NVMD6P02 http://onsemi.com 4 r g , gate resistance (ohms) 1 10 100 100 10 t, time (ns) v dd = ? 16 v i d = ? 1.0 a v gs = ? 10 v t r t d(on) 20 v gs , gate ? to ? source voltage (volts) 4 0 0 1 0 q g , total gate charge (nc) v ds , drain ? to ? source voltage (volts) 5 5.0 10 20 i d = ? 6.2 a v ds = ? 16 v v gs = ? 4.5 v t j = 25 c 15 v ds v gs q2 q1 1000 t f 3 2 8 12 4 16 qt 25 t d(off) r g , gate resistance (ohms) 1 10 100 100 10 t, time (ns) v dd = ? 16 v i d = ? 6.2 a v gs = ? 4.5 v t r t d(on) 1000 t f t d(off) gate ? to ? source or drain ? to ? source voltage (volts) c, capacitance (pf) 1000 4000 figure 7. capacitance variation 10 0 5.0 10 5.0 t j = 25 c c iss c oss c rss 15 20 0 2000 3000 c iss c rss v ds = 0 v v gs = 0 v ? v ds ? v gs 5000 500 1500 4500 2500 3500 figure 8. gate ? to ? source and drain ? to ? source voltage versus total charge figure 9. resistive switching time variation versus gate resistance figure 10. resistive switching time variation versus gate resistance drain ? to ? source diode characteristics 0 0.2 0.4 0.6 0 1 2 ? v sd , source ? to ? drain voltage (volts) figure 11. diode forward voltage versus current ? i s , source current (amps) 5 v gs = 0 v t j = 25 c 3 1.2 4 figure 12. maximum rated forward biased safe operating area 0.1 ? v ds , drain ? to ? source voltage (volts) 0.1 1 ? i d , drain current (amps) r ds(on) limit thermal limit package limit v gs = 2.5 v single pulse t c = 25 c 10 dc 1 100 100 10 10 ms 1.0 ms 0.8 1.0
ntmd6p02, NVMD6P02 http://onsemi.com 5 figure 13. diode reverse recovery waveform di/dt t rr t a t p i s 0.25 i s time i s t b typical electrical characteristics figure 14. thermal response t, time (s) rthja(t) , effective transient thermal resistance 1 0.1 0.01 d = 0.5 single pulse 1.0e ? 05 1.0e ? 04 1.0e ? 03 1.0e ? 02 1.0e ? 01 1.0e+00 1.0e+01 0.2 0.05 0.01 1.0e+02 1.0e+03 0.001 10 0.0175 0.0710 0.2706 0.5776 0.7086 107.55 f 1.7891 f 0.3074 f 0.0854 f 0.0154 f chip ambient normalized to ja at 10s. 0.1 0.02
ntmd6p02, NVMD6P02 http://onsemi.com 6 package dimensions soic ? 8 nb case 751 ? 07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* style 11: pin 1. source 1 2. gate 1 3. source 2 4. gate 2 5. drain 2 6. drain 2 7. drain 1 8. drain 1 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ntmd6p02r2/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
|
